طراحی و شبیه‌سازی یک تمام جمع‌کننده جدید در تکنولوژی نانو لوله‌ی کربنی با عملکرد بهینه

نوع مقاله: مقاله پژوهشی

نویسندگان

1 شرکت کوثر سپاهان، اصفهان

2 دانشگاه آزاد اسلامی، مبارکه

چکیده

مدار تمام جمع کننده، به دلیل توانایی در پیاده‌سازی چهار عمل اصلی محاسباتی (جمع، تفریق، ضرب و تقسیم) به عنوان یکی از مهمترین و پرکاربردترین بخش‌های اصلی پردازنده‌های دیجیتالی در طرّاحی مدارهای مجتمع، شناخته می‌شود. بدین منظور، در این مقاله تلاش شده است که سلول تمام جمع‌کننده‌ی جدیدی با بهره‌گیری از تکنولوژی ترانزیستورهای نانولوله‌ی کربنی، جهت دستیابی به مداری با عملکردی مناسب و توان مصرفی کم، ارائه گردد. طرح پیشنهادی از 12 ترانزیستور CNTFET که با استفاده از منطق ترانزیستورهای عبور به هم متصل شده‌اند، تشکیل شده است. ترانزیستورهای نانولوله‌ی کربنی در توان مصرفی و سرعت عملکرد، برتری قابل توجهی نسبت به ترانزیستورهایMOSFET   از خود نشان می‌دهند. شبیه‌سازی طرح پیشنهادی، با استفاده از نرم افزار Hspice و بر مبنای مدل CNTFET، با ولتاژ اعمالی  V65/0 در سه فرکانس و سه مقدار خازن بار متفاوت، انجام می‌شود و نتایج به دست آمده، برتری طرح پیشنهادی را نسبت به مدارهای نظیر ارائـه شده در مقالات پیشین، اثبـات می‌کند

کلیدواژه‌ها


عنوان مقاله [English]

Design and Simulation of a New Optimized Full-Adder Using Carbon Nano Tube Technology

نویسندگان [English]

  • Abbas Asadi Aghbolaghi 1
  • Mehran Emadi 2
1 Kowsar Slamt Sepahan, Esfahan
2 Assistant Professor - Department of Electrical Engineering ,Mobarakeh Branch, Islamic Azad University, Mobarakeh
چکیده [English]

The full adder circuit is one of the most significant and prominent fundamental parts in digital processors and integrated circuits since it can be used for implementing all four basic computational functions including: addition, subtraction, multiplication, and division. so, in this paper a new low power and high performance full adder cell has been proposed with the benefit of using carbon nano tube field effect transistors. The proposed design contains 12 CNTFET transistors which are connected in pass transistor logic style to make the desired functionality. Carbon Nano Tube Field Effect Transistor (CNTFET) has modified electrical characteristics such as low power consumption and high speed in comparison with MOSFET transistor; The proposed design is simulated using Hspice software based on CNTFET model and 0.65V supply voltage. the simulations are done considering three different frequencies, and three different load capacitors. The simulation results, which demonstrated in tables and diagrams, proved the superiority of proposed design in terms of power consumption and performance (PDP) compared to the existing counterparts.

کلیدواژه‌ها [English]

  • Carbon nano tube field effect transistor
  • full adder cell
  • Carbon Nano Tube
  • VLSI design
[1] S. Issam, A. Khater, A. Bellaouar, M.I. Elmasry, "Circuit techniques for CMOS low-power high performance multipliers", IEEE Journal of Solid-State Circuit, Vol.31, pp. 1535-154431, Oct. 1996.

[2] M. Kumar, S. Arya, S. Pandey," Single bit full adder design using 8 transistors with novel 3 transistors xnor gate", International Journal of VLSI design and Communication Systems, Vol. 2, No. 4, Dec. 2011.

[3] G.K. Reddy, "Low power-area designs of 1 bit full ader in cadence virtuoso platform", International Journal of VLSI design & Communication Systems, Vol. 4, No. 4, pp. 55–64, Aug. 2013.

[4] R. Zimmermann, W. Fichtner, "Low-power logic styles: cmos versus pass-transistor logic", IEEE Journal of Solid-State Circuits, Vol. 32, pp. 1079-1090, July 1997.

[5] K. Navi, O. Kavehei, M. Ruholamini, A. Sahafi, S. Mehrabi, N. Dadkhahi, "Low-power and high-performance 1-bit cmos full adder cell", Journal of computers, Vol. 3, No. 2, 2008

[6] J.M. Rabaey, "Digital integrated circuits, a design perspective", Prentice Hall, Englewood Cliffs, NJ, 1996.

[7] R. Mirzaee, M. Moaiyeri, K. Navi, "High speed np-cmos and multi-output dynamic full adder cells", International Journal of Electrical, Computer, and Systems Engineering, Vol. 4, No. 4, pp. 304–310, 2010.

[8] K. Navi,M. Maeen, V. Foroutan, S. Timarchi, O. Kavehei, "A novel low-power full-adder cell for low voltage",  Integration, the VLSI Journal, Vol. 42, pp. 457–467, 2009.

[9] K. Navi ,V. Foroutan, M. RahimiAzghadi, M. Maeen, M. Ebrahimpour, M. Kaveh, O. Kavehei, "A novel low-power full-adder cell with new technique in designing logical gates based on static cmos inverter", Microelectronics Journal, Vol. 40, pp. 1441–1448, 2009.

[10] M. Alizadeh, B. Forouzandeh, R. Sabbaghi-Nadooshan, "Six new full adder cells based on majority-not gate in 45nm cmos technology and analysis in soi technology", International Journal of Computer Science Issues, Special Issue, ICVCI-2011, Vol. 1, No. 1, Nov. 2011.

[11] S. Wairya, R.K. Nagaria, S. Tiwari, “New design methodologies for high-speed mixed-mode cmos full adder circuits”, International Journal of VLSI design and Communication Systems, Vol. 2, No. 2, June 2011.

[12] K. Navi, R. Zabihi, M. Haghparast, T. Nikobin, “A novel mixed mode current and dynamic voltage full adder” , World Applied Sciences Journal, Vol. 4, No. 2, pp. 289-294, 2008.

[13] S. Iijima,"Helical microtubules of graphitic carbon”, Nature,Vol. 354, pp. 56-58,7 Nov. 1991.

[14] S. Iijima, T. Ichihashi, "Single-shell carbon nanotubes of 1-nm diameter”, Nature, Vol. 363, pp. 603-605, 17 June 1993.

[15] J. Deng, “Device modeling and circuit performance evaluation for nanoscale devices: silicon technology beyond 45 nm node and carbon nanotube field effect transistors”, Ph.D. Dissertation,  Stanfor University, 2007.

[16] K. Navi, A. Momeni, F. Sharifi, P. Keshavarzian, "Two novel ultra high speed carbon nanotube full-adder cells", IEICE Electronics Express, Vol. 6, No. 19, pp.1395-1401, 2009.

[17] K. Navi, M. Rashtian, A. Khatir, P. Keshavarzian, O. Hashemipour, “ High speed capacitor- inverter based carbon nano tube full adder”,  Nanoscale RessLett, Vol. 5, pp. 859-862, 2010.

[18] A. Khatir , Sh. Abdolahzadegan ,I. Mahmoudi, “High speed multiple valued logic full adder using carbon nano tube field effect transistor”, International Journal of VLSI design and Communication Systems, Vol. 2, No.1, 2011.

[19] K. Navi, H.H. Sajedi, R. F. Mirzaee, M.H. Moaiyeri, A. Jalali, O. Kavehei, “High-speed full adder based on minority function and bridge style for nanoscale”, Integration , the VLSI Journal, Vol. 44, pp. 155–162, 2011.

[20] M. Bagherizadeh, M. Eshghi, “Two novel  low-power and high-speed dynamic carbon nanotube full-adder cells”, Nanoscale Research Letters, 6:519, Sep. 2011.

[21] A. AsadiAghbolaghi., Sh. Moghimi, “Designing a new full adder with carbon nano-tube technology”, Nano Symposium, Islamic Azad University, Najafabad Branch, Materials Department, Najaf Abad, Iran, April 2014.

22] M. Moradi, R.F. Mirzaee, M.H. Moaiyeri, K. Navi, “An applicable high-efficient cntfet-based full adder cell for practical environments”, International Symposium on Computer Architecture and Digital Systems, 2012.

[23] F. Sharifi, A. Momeni, K. Navi, “Cnfet based basic gates and a novel full adder cell”, International Journal of VLSI design and Communication Systems, Vol. 3, No. 3, June 2012.

[24] R. SharifiRad, M. Norouziand, S.K.H. Rabori, “A great efficiency full adder cell based on carbon nano-tube technology”, Research Journal of Applied Sciences, Engineering and Technology, Vol. 5, No. 14, pp. 3791-3795, 2013.

[25] A. AsadiAghbolaghi, M. Emadi, M. Dolatshahi. “Designing and analyzing a full adder using carbon nano-tube technology”. International Conference on Information Technology Management, Communication and Computer, June 2014.

[26] A. AsadiAghbolaghi., M. Emadi, M. Dolatshahi, “Designing a high speed full adder with carbon nano-tube technology”, National Conference on Computer Science and Engineering, Islamic Azad University, Najafabad Branch, Oct. 2014

[27] A. Ghorbani, M. Sarkhosh, E. Fayyazi , N. Mahmoudi , P. Keshavarzian, "A  novel full adder cell based on carbon  nano tube field effect transistors” , International Journal of VLSI design and Communication Systems, Vol. 3, No. 3, 2012.

[28] A. Ghorbani, M. Sarkhosh, "A new low power full adder cell based on carbon nanotube field effect transistors", Journal of Basic and Applied Scientific Research, Vol. 3, No. 3, pp. 1267-1272, 2013